Machine learning techniques to create higher resolution compressed data structures representing textures from lower resolution compressed data structures and training therefor

ABSTRACT

Machine learning is used to generate a first mipmap of a texture having a first compression based on a second mipmap of the same texture and having a second compression without using compression or decompression in generating the first mipmap. The first mipmap can then be used to render a computer graphics object. Training can be done using as input decompressed blocks from originally compressed blocks.

FIELD

The present application relates to technically inventive, non-routine solutions that are necessarily rooted in computer technology and that produce concrete technical improvements.

BACKGROUND

In computer simulations such as computer gaming, objects are rendered in part using “texture” data that describes the surfaces of the objects. The more texture data for a given object, the higher resolution the rendering can be. However, for bandwidth purposes it is desirable not to send large texture data structures to a rendering device.

SUMMARY

As understood herein, so-called “mipmaps” may be used to conserve bandwidth in the following manner. Mipmaps are a sequence of texture data structures, each of which is a progressively reduced resolution representation of preceding texture data structure. Usually this reduction is by a factor of two in each dimension. Bandwidth is conserved by using higher-resolution mipmaps to render objects near the viewer and lower-resolution mipmaps to render objects distant to the viewer. Usually the mipmap level is chosen to be the one that most closely matches the pixel density of the image. Ideally one texture pixel per screen pixel is desired. A texture pixel may also be referred to as a “texel” (combination of texture and pixel).

However, as also understood herein, to conserve memory, texture data is usually compressed into one of a variety of block compression (BCn) modes that are natively sample-able on GPUs. The maximum resolution of a texture is usually limited by storage space constraints and artist authoring time. Using existing machine learning based techniques or other to produce higher resolution images from lower resolution require first decompressing the BCn compressed texture data, upsampling and re-compressing. This is not desirable as it requires extra storage space for uncompressed versions of both the low resolution and high-resolution images, and the process for BCn compressing is quite complex and computationally expensive.

Accordingly, an assembly includes at least one processor configured with instructions to train at least one machine learning (ML) engine to create higher resolution computer graphics textures (CGT) from lower resolution CGT. The training is accomplished by compressing plural training blocks having a first number of texels to create compressed training blocks, decompressing the compressed training blocks to create decompressed training blocks, and inputting the decompressed training blocks to the ML engine for the ML engine to up-res the decompressed training blocks into predicted higher resolution training blocks.

In some example implementations, the instructions can be executable to input to the ML engine ground truth higher resolution blocks corresponding to respective decompressed training blocks for comparison with the predicted higher resolution training blocks.

In some implementations of this first aspect, the instructions can be executable to input each one of at least some of the plural training blocks to N compressors each operating in accordance with a respective N^(th) block compression mode to generate, for each of the at least some of the plural training blocks, a respective N outputs. Each of the N outputs is decompressed to create, for each one of the at least some of the plural training blocks, N decompressed training blocks that are input to the ML engine for the ML engine to up-res into predicted higher resolution training blocks.

In other embodiments, instead of imputing all N outputs to the ML engine for training, a predicted error may first be obtained for each of the N outputs and used to select a respective N^(th) block compression mode with which to compress the respective training block and decompress it, and input only the resulting decompressed training block to the ML engine for training. In addition to predicted errors, processing costs associated with each mode also may be considered in selecting the N^(th) compression mode.

In non-limiting examples, the plural training blocks can include one or more mipmaps, the CGT can include physically based rendering and materials (PBR) data, and the higher resolution CGT can includes a mipmap that is one mip level higher than the lower resolution CGT.

In another aspect, an assembly includes at least one computer storage that is not a transitory signal and that includes instructions executable by at least one processor to input decompressed texture blocks associated with a first resolution to at least one machine learning (ML) algorithm. The instructions are executable to input ground truth texture blocks associated with a second resolution higher than the first resolution to the ML algorithm and execute the ML algorithm to train on the decompressed texture blocks and ground truth texture blocks. The instructions further are executable to, subsequent to training, execute the ML algorithm to receive lower resolution textures from a source and generate higher resolution textures from the lower resolution textures without decompressing or compressing the lower resolution textures.

In another aspect, a method includes accessing at least one machine learning (ML) engine and training the ML engine using decompressed texture blocks to generate higher resolution from lower resolution textures.

In example embodiments of this aspect, the ML engine generates the higher resolution textures from the lower resolution textures without using decoding or encoding.

In some embodiments of this aspect, the method may include training the ML engine using N versions of each one of at least some of the decompressed texture blocks. The N versions are generated by respective N compression modes.

In other embodiments of this aspect, the ML engine may be trained using at least one and less than N versions of each one of at least some of the decompressed texture blocks generated by respective N compression modes. The version or version can be selected based at least in part on predicted errors associated with each of the N modes, and if desired also based on processing constraints associated with each of the N modes.

The details of the present disclosure, both as to its structure and operation, can be best understood in reference to the accompanying drawings, in which like reference numerals refer to like parts, and in which:

BRIEF DESCRIPTION OF THE DRAWINGS

FIG. 1 is a block diagram of an example system including an example in consistent with present principles;

FIG. 2 illustrates an example texture communication path;

FIG. 3 illustrates example components of a PBR material;

FIG. 4 illustrates example logic in example flow chart format for providing ground truth training data;

FIG. 5 illustrates example logic in example flow chart format for training a texture-rendering machine learning engine;

FIG. 6 illustrates example logic in example flow chart format for providing textures to a renderer;

FIG. 7 illustrates example logic in example flow chart format for upscaling input textures using the machine learning engine;

FIG. 8 illustrates example logic in example flow chart format for upscaling two texture data types together;

FIG. 9 illustrates example logic in example flow chart format for training a machine learning engine using decompressed textures;

FIG. 10 illustrates an example training system consistent with present principles; and

FIG. 11 illustrates example logic in example flow chart format for predicting a best compression mode.

DETAILED DESCRIPTION

This disclosure relates generally to computer ecosystems including aspects of consumer electronics (CE) device-based user information in computer ecosystems. A system herein may include server and client components, connected over a network such that data may be exchanged between the client and server components. The client components may include one or more computing devices including portable televisions (e.g. smart TVs, Internet-enabled TVs), portable computers such as laptops and tablet computers, and other mobile devices including smart phones and additional examples discussed below. These client devices may operate with a variety of operating environments. For example, some of the client computers may employ, as examples, operating systems from Microsoft or Unix or Apple, Inc., or Google. These operating environments may be used to execute one or more browsing programs, such as a browser made by Microsoft or Google or Mozilla or other browser program that can access web applications hosted by the Internet servers discussed below.

Servers may include one or more processors executing instructions that configure the servers to receive and transmit data over a network such as the Internet. Or a client and server can be connected over a local intranet or a virtual private network. A server or controller may be instantiated by a game console such as a Sony Playstation®, a personal computer, etc.

Information may be exchanged over a network between the clients and servers. To this end and for security, servers and/or clients can include firewalls, load balancers, temporary storages, and proxies, and other network infrastructure for reliability and security. One or more servers may form an apparatus that implement methods of providing a secure community such as an online social website to network members.

As used herein, instructions refer to computer-implemented steps for processing information in the system. Instructions can be implemented in software, firmware or hardware and include any type of programmed step undertaken by components of the system.

A processor may be a single- or multi-chip processor that can execute logic by means of various lines such as address lines, data lines, and control lines and registers and shift registers. A processor may be implemented by or may include one or more graphics processing units (GPU).

Software modules described by way of the flow charts and user interfaces herein can include various sub-routines, procedures, etc. Without limiting the disclosure, logic stated to be executed by a particular module can be redistributed to other software modules and/or combined together in a single module and/or made available in a shareable library.

Present principles described herein can be implemented as hardware, software, firmware, or combinations thereof; hence, illustrative components, blocks, modules, circuits, and steps are set forth in terms of their functionality.

Further to what has been alluded to above, logical blocks, modules, and circuits described below can be implemented or performed with a digital signal processor (DSP), a field programmable gate array (FPGA) or other programmable logic device such as an application specific integrated circuit (ASIC), discrete gate or transistor logic, discrete hardware components, or any combination thereof designed to perform the functions described herein. A processor can be implemented by a controller or state machine or a combination of computing devices.

The functions and methods described below, when implemented in software, can be written in an appropriate language such as but not limited to Java®, C# or C++, and can be stored on or transmitted through a computer-readable storage medium such as a random access memory (RAM), read-only memory (ROM), electrically erasable programmable read-only memory (EEPROM), compact disk read-only memory (CD-ROM) or other optical disk storage such as digital versatile disc (DVD), magnetic disk storage or other magnetic storage devices including removable thumb drives, etc. A connection may establish a computer-readable medium. Such connections can include, as examples, hard-wired cables including fiber optics and coaxial wires and digital subscriber line (DSL) and twisted pair wires.

Components included in one embodiment can be used in other embodiments in any appropriate combination. For example, any of the various components described herein and/or depicted in the Figures may be combined, interchanged, or excluded from other embodiments.

“A system having at least one of A, B, and C” (likewise “a system having at least one of A, B, or C” and “a system having at least one of A, B, C”) includes systems that have A alone, B alone, C alone, A and B together, A and C together, B and C together, and/or A, B, and C together, etc.

Now specifically referring to FIG. 1, an example ecosystem 10 is shown, which may include one or more of the example devices mentioned above and described further below in accordance with present principles. The first of the example devices included in the system 10 is an example primary display device, and in the embodiment shown is an audio video display device (AVDD) 12 such as but not limited to an Internet-enabled TV. Thus, the AVDD 12 alternatively may be an appliance or household item, e.g. computerized Internet enabled refrigerator, washer, or dryer. The AVDD 12 alternatively may also be a computerized Internet enabled (“smart”) telephone, a tablet computer, a notebook computer, a wearable computerized device such as, e.g., a computerized Internet-enabled watch, a computerized Internet-enabled bracelet, other computerized Internet-enabled devices, a computerized Internet-enabled music player, computerized Internet-enabled head phones, a computerized Internet-enabled implantable device such as an implantable skin device, etc. Regardless, it is to be understood that the AVDD 12 is configured to undertake present principles (e.g. communicate with other CE devices to undertake present principles, execute the logic described herein, and perform any other functions and/or operations described herein).

Accordingly, to undertake such principles the AVDD 12 can be established by some or all of the components shown in FIG. 1. For example, the AVDD 12 can include one or more displays 14 that may be implemented by a high definition or ultra-high definition “4K” or “8K” (or higher resolution) flat screen and that may be touch-enabled for receiving consumer input signals via touches on the display. The AVDD 12 may include one or more speakers 16 for outputting audio in accordance with present principles, and at least one additional input device 18 such as a keyboard or keypad or an audio receiver/microphone for e.g. entering audible commands to the AVDD 12 to control the AVDD 12. The example AVDD 12 may also include one or more network interfaces 20 for communication over at least one network 22 such as the Internet, an WAN, an LAN, etc. under control of one or more processors 24. Thus, the interface 20 may be, without limitation, a Wi-Fi transceiver, which is an example of a wireless computer network interface. It is to be understood that the processor 24 controls the AVDD 12 to undertake present principles, including the other elements of the AVDD 12 described herein such as e.g. controlling the display 14 to present images thereon and receiving input therefrom. Furthermore, note the network interface 20 may be, e.g., a wired or wireless modem or router, or other appropriate interface such as, e.g., a wireless telephony transceiver, or Wi-Fi transceiver as mentioned above, etc.

In addition to the foregoing, the AVDD 12 may also include one or more input ports 26 such as, e.g., a USB port to physically connect (e.g. using a wired connection) to another CE device and/or a headphone port to connect headphones to the AVDD 12 for presentation of audio from the AVDD 12 to a consumer through the headphones. The AVDD 12 may further include one or more computer memories 28 that are not transitory signals, such as disk-based or solid-state storage (including but not limited to flash memory). Also, in some embodiments, the AVDD 12 can include a position or location receiver such as but not limited to a cellphone receiver, GPS receiver and/or altimeter 30 that is configured to e.g. receive geographic position information from at least one satellite or cellphone tower and provide the information to the processor 24 and/or determine an altitude at which the AVDD 12 is disposed in conjunction with the processor 24. However, it is to be understood that that another suitable position receiver other than a cellphone receiver, GPS receiver and/or altimeter may be used in accordance with present principles to e.g. determine the location of the AVDD 12 in all three dimensions.

Continuing the description of the AVDD 12, in some embodiments the AVDD 12 may include one or more cameras 32 that may be, e.g., a thermal imaging camera, a digital camera such as a webcam, and/or a camera integrated into the AVDD 12 and controllable by the processor 24 to gather pictures/images and/or video in accordance with present principles. Also included on the AVDD 12 may be a Bluetooth transceiver 34 and other Near Field Communication (NFC) element 36 for communication with other devices using Bluetooth and/or NFC technology, respectively. An example NFC element can be a radio frequency identification (RFID) element.

Further still, the AVDD 12 may include one or more auxiliary sensors 37 (e.g., a motion sensor such as an accelerometer, gyroscope, cyclometer, or a magnetic sensor, an infrared (IR) sensor, an optical sensor, a speed and/or cadence sensor, a gesture sensor (e.g. for sensing gesture command, etc.) providing input to the processor 24. The AVDD 12 may include still other sensors such as e.g. one or more climate sensors 38 (e.g. barometers, humidity sensors, wind sensors, light sensors, temperature sensors, etc.) and/or one or more biometric sensors 40 providing input to the processor 24. In addition to the foregoing, it is noted that the AVDD 12 may also include an infrared (IR) transmitter and/or IR receiver and/or IR transceiver 42 such as an IR data association (IRDA) device. A battery (not shown) may be provided for powering the AVDD 12.

Still referring to FIG. 1, in addition to the AVDD 12, the system 10 may include one or more other CE device types. In one example, a first CE device 44 may be used to send messages to a second CE device 46 may include similar components as the first CE device 44 and hence will not be discussed in detail. In the example shown, only two CE devices 44, 46 are shown, it being understood that fewer or greater devices may be used.

The example non-limiting first CE device 44 may be established by any one of the above-mentioned devices, for example, a portable wireless laptop computer or tablet computer or notebook computer or mobile telephone, and accordingly may have one or more of the components described below. The second CE device 46 without limitation may be established by a wireless telephone. The second CE device 46 may implement a portable hand-held remote control (RC). The second CE device 46 may implement virtual reality (VR) and/or augmented reality (AR) a head-mounted display (HMD). The CE devices 44, 46 may include some or all of the components illustrated in the case of the AVDD 12.

At least one server 50 may include at least one server processor 52, at least one computer memory 54 such as disk-based or solid-state storage, and at least one network interface 56 that, under control of the server processor 52, allows for communication with the other devices of FIG. 1 over the network 22, and indeed may facilitate communication between servers and client devices in accordance with present principles. Note that the network interface 56 may be, e.g., a wired or wireless modem or router, Wi-Fi transceiver, or other appropriate interface such as, e.g., a wireless telephony transceiver.

Accordingly, in some embodiments the server 50 may be an Internet server and may include and perform “cloud” functions such that the devices of the system 10 may access a “cloud” environment via the server 50 in example embodiments. Or the server 50 may be implemented by a game console or other computer in the same room as the other devices shown in FIG. 1 or nearby.

Devices discussed herein may include some or all, as appropriate, of the various components shown in FIG. 1.

Prior to turning to FIG. 2, “textures” are data structures that can be mapped onto images to characterize the surfaces of the rendered objects. The basic data element of a texture data structure is a texture element or texel (combination of texture and pixel). Textures are represented by arrays of texels representing the texture space. The texels are mapped to pixels in an image to be rendered to define the rendered surface of the image.

Thus, textures are data and not images and so neural network (NN) training below does not necessarily rely on perceptual error principles. An exception may be made for albedo (discussed further below) but in general texture data training uses an error metric specific to the purpose of the particular data.

Some types of data such as normal and roughness can be paired together because the two can absorb each other's error since they are interrelated. With greater specificity, in PBR rendering a relationship exists between normal map data and roughness data (sometimes referred to as gloss data). Roughness describes essentially the variance of normals across a texture pixel. As such, techniques exist to modify roughness to account for data lost when reducing the resolution of normal maps when generating mipmaps, essentially anti-aliasing the normal map. In this case there is a tight association between a normal map and the corresponding roughness map.

With additional detail on textures, physically based rendering (PBR) and materials is a general set of guiding principles for rendering realistic material and light interaction which involves using various types of data stored in textures. Light is modeled as either diffuse or specular. Diffuse lighting is generally view-independent and generally does not change not matter want angle the material is viewed from. Specular lighting, on the other hand, is view-dependent to emulate, e.g., glare.

Generally, PBR textures include the parameter of “albedo”, which characterizes the diffuse lighting response of a material. For example, for an emulated surface of polished wood, the albedo texture contains the wood grain pattern and color changes but no shape information, very flat. Metals have no albedo as all of their lighting response comes from specular.

As mentioned above, PBR textures also may include the parameter of “normal”. A normal map defines the small shape detail for the surface, specifically representing the surface normal of the underlying surface. This may or may not be decoupled from the geometric normal of triangle data used in rendering. This is vector data stored as a texture, and while it can be viewed it is not an image per se. In the wood example this might be mostly flat where the wood is smooth but contain detail for etching or carving in the wood surface.

As is also mentioned above, PBR textures also may include the parameter of Gloss/Roughness, which defines how rough the surface to be rendered is. Generally, this is considered to be variance of sub-pixel normal data (detail smaller than a texel in the normal map). In the wood example this might contain data about scuffs in the wood (imagine scrubbing the wood with sandpaper) in the case of polished wood it would be relatively smooth and thus the roughness would be low.

Another PBR parameter is Reflectance, representing the specular lighting response. For most non-metal materials reflectance has no color. Reflectance for nearly all non-metals is a constant 2% (how much light is directly reflected). For a mirror, reflectance approaches 100%.

Some PBR techniques attempt to exploit the fact that non-metals have a constant reflectance and that metals have no albedo. This usually involves repurposing the albedo texels where a surface is metal to instead represent the reflectance (with color, gold, brass etc.) and storing extra information in other another texture channel to identify which texels are metal and not. Generally, this information is referred to as “metalness”. This encoding is generally done to save texture memory by not storing three channels for albedo and another three channels for reflectance.

In general textures can have varying purposes and can differ from game engine to game engine.

With the above discussion of textures in mind, multiple versions of the same texture typically are generated, of varying compression (and, hence, or varying resolution). Specifically, a single texture may be represented by a full mipmapped chain of textures. Mipmapping takes an image and reduces the resolution by a factor of two successively. Thus, for any given texture, e.g., 1024×1024, there is also stored in memory a 512×512 version of it and a 256×256 version of it and so on. This enhances performance, visual fidelity, and facilitates texture streaming. Texture streaming attempts to conserve memory by only loading the necessary mipmap “tail” (a lower miplevel and all the lower resolution miplevels below it) for a given texture based on the rendered objects' size of screen. For example, a 256×256 mip level and lower of a 1024×1024 texture's mip chain may be all that is needed to be loaded for an object that is far away. Which mip levels are loaded changes on-demand based on the changing game environment and viewer position. As objects get closer, higher resolution mip levels or “levels of detail” are loaded into memory for rendering the now-closer objects.

Various types of compression may be used on textures. One type is block compression, sometimes expressed as BCn compression that is a lossy texture compression which can be decompressed in-place by graphics processing units (GPUs). Block compression does not require the whole image to be decompressed, so the GPU can decompress the data structure while sampling the texture as though it was not compressed at all.

Block compression techniques compress 4×4 blocks of pixels into a single (smaller) data packet. Generally, this involves selecting two or more (depending on the BC compression type) “endpoint” colors with some information per-pixel about how to blend between those two colors at each pixel. The endpoint colors are shared for the entire 4×4 pixel block. For instance, for an image of only red, blue, and purple pixels, the compressor would likely choose one end point to be red, and the other blue. The purple pixels would have values that blend the two together.

The different BC types mostly differ in how many texture channels they have (BC4 for instance is one channel grayscale, “black and white”). BC6 and BC7 are special because they introduce the concept of modes that decide the interpretation of each block. For the other BC modes all blocks are encoded the same way, with the same number of bits allocated for endpoint colors and blend values. With BC6/7 different modes allocate their bits differently on a per-block basis which allows the compressor to make different quality trade-offs in different regions of a texture.

FIG. 2 illustrates a texture source 200 that sends textures for rendering in accordance with principles above via a communication path 202 such as a local data bus or wired/wireless network link to a texture renderer 204, which typically includes one or more GPUs with memories to render images in accordance with image data and texture data on a display.

FIG. 3 shows that in embodiments herein, only a tail texture 300 need be sent from the source 200 to the renderer 204, which can execute a machine learning engine 302 on the texture to up-scale it to a texture 304 with the next highest level of resolution without the need for decoding/encoding and, hence, without the need for a codec. The machine learning engine 302 may include one or more trained neural networks such as generative, noise-based, possibly adversarial networks.

Thus, machine learning is used to generate a mipmap of a texture that is one level higher than an input mipmap (for instance, from a mipmap chain authored on disk) for all streamed textures. The new (higher resolution) mipmap may be introduced similarly as if it existed on the disk, just generated procedurally instead. Since the textures can be stored on disk in BCN compressed formats, the network generates a new compressed mip level from the highest existing compressed mip level in memory. If the cost of generating the mip levels at run time is too high, mip levels can be generated offline and stored on disk using the same method.

FIG. 4 illustrates example training principles for the machine learning engine 302 in FIG. 3. An existing texture library may be accessed at block 400 for ground truth training and compressed at block 402 to establish the next mip level down (again half by half). In other words, full, uncompressed (and thus highest resolution) mipmaps may be accessed at block 400 and compressed by one-half at block 402 to create a compressed (and thus lower resolution) mipmap. The mipmaps generated at block 402 may be successively compressed according to principles herein to create a full set of mipmaps for each input non-compressed mipmap, producing ground truth at block 404.

FIG. 5 illustrates that a simple network may access at block 500 one compressed BC block data packet from the ground truth set and generate at block 502 four BC block data packets for the higher mip level, effectively going from, e.g., a 4×4 block of pixels to 8×8 block of pixels. Alternatively, instead of or in addition to taking in one BC block as input, a neighborhood of blocks surrounding the block (e.g., eight surrounding blocks) may also be provided as input, to better inform the network of features.

Training may be implemented using backpropagation, gradient descent. Training may be executed using 80/20 train test split in which 80 percent random sample of the ground truth data is used to train or set the weights in the NN, then the additional 20 percent of test data downscaled files are input and compared to what the NN generated. In other words, the output of the NN can be compared against the ground truth 20 percent full resolution files that were not input during training session.

Because there are principally different types of data between the different material attribute textures, different networks may be trained for each material attribute type. For example, one network may be trained for upscaling reflectance texture data and another network may be trained for upscaling albedo.

In the case of normal and roughness, which store similar data and therefore have some cross relationships, a single network may be trained to upscale them together. The same consideration may apply to other related pairs or groups of material attributes. In the case of a shared normal and roughness up-res network, one BC block with normal data and one BC block of roughness data at the same associated location may be input, and the network may output four BC blocks of normal data and four BC blocks of roughness data.

FIG. 6 illustrates that textures may be compressed at block 600 and sent to the renderer at block 602. In one example the lowest resolution (most highly compressed) “tail” textures in mipmap chains are sent to the renderer, which can upscale them on the fly using the trained machine learning engine described herein without the need for a codec. In other embodiments a relatively little-compressed, high resolution texture (or the uncompressed base texture itself) may be provided as input to the renderer, which can generate, using machine learning, more-compressed, less resolution textures.

FIG. 7 illustrates the renderer logic. The input textures are received at state 700. The textures are processed through the trained machine learning engine at block 702 to output differently compressed textures at block 704, either more-compressed (lower resolution) or less-compressed (higher resolution) than the input textures. The textures at block 704 are used to render images on a display.

FIG. 8 illustrates that in the case of a shared normal and roughness up-res network, one BC block with normal data is received by the machine learning engine at block 800 and one BC block of roughness data at the same associated location is received at block 802. At block 804 the machine learning engine upscales the two input blocks together to output four BC blocks of normal data and four BC blocks of roughness data.

Now referring to FIG. 9, techniques for training a ML engine in addition to those alluded to above may be seen. Commencing at block 900, ground truth textures or texture portions such as 2×2 texel blocks and corresponding higher resolution blocks such as 4×4 texel blocks are received. Moving to block 902, the lower resolution (e.g. 2×2) blocks are compressed using one or more block compression modes and then decompressed at block 904 using the same mode or modes. The decompressed blocks along with the corresponding higher resolution ground truth blocks are input to the ML engine or algorithm at block 906 for training.

The above technique of using decompressed blocks instead of original, uncompressed blocks enables accounting for compromises a particular compression mode or modes might make, providing more realistic training.

FIGS. 10 and 11 illustrate additional techniques related to the overall logic of FIG. 9. In FIG. 10, uncompressed N×N texture blocks such as 2×2 texel blocks can be sent to plural block compressors 1002, 1004, each operating in a respective block compression mode. The compressors 1002, 1004 compress the blocks and send the compressed blocks to respective decompressors 1006, 1008 operating in the same modes as the compressors from which the compressed blocks are received. The decompressed blocks (i.e., N versions of each decompressed block, one for each compression mode) can be used at block 906 in FIG. 9 to train the ML engine or algorithm, or they can be sent to an error prediction module 1010 for pruning which of the N versions of each decompressed block ae used at block 906 in FIG. 9.

FIG. 11 illustrates an example non-limiting error prediction module 1010. Commencing at block 1100, for a particular frame of a first resolution (typically lower resolution) from whence uncompressed training texture blocks are derived (e.g., 2×2 texel blocks), a processing budget or cost basis may be established in terms of, e.g., time. Thus, depending on the type of frame, a variable (higher or lower) processing budget may be defined. For example, shorter or less complex frames may have larger processing budgets than longer, larger, or more complex frames.

Moving to block 1102, for each mode of each input training block, the model predicts a respective error for the mode for that block in correctly outputting a higher resolution block (e.g., a 4×4 block). Without limitation, a recurrent neural network (RNN) such as a long short-term memory (LSTM) may be used to predict errors.

Decision diamond 1104 indicates that the modes for the block under test can be ranked according to predicted error, and if the “best” mode in terms of having the lowest predicted error is not within a threshold predicted error differential of the next-best mode or modes, that mode is output as the “best” mode at state 1106, for use of the corresponding decompressed block rendered according to the “best” mode in block 906 of FIG. 9.

On the other hand, if the second- or third-best mode (or additional modes) in terms of error prediction are within a threshold predicted error differential to the best mode, the logic proceeds from decision diamond 1106 to decision diamond 1108 to identify the processing budget for the best and next-best mode(s) within the predicted error differential. If the processing budget of the best mode is not within a threshold budget differential of the next-best mode(s) and the budget(s) of the next-best mode(s) are lower than that of the best mode (meaning that significant processing budget can be saved using the next-best mode(s) instead of the best mode), the logic moves to block 1110 to use, as input to block 906 in FIG. 9, the next-best mode(s). In this way, if an “expensive” mode is best in terms of predicted error but only by a little compared to the next-best mode(s), and significant processing budget can be saved by using the next-best mode(s), the next-best mode(s) in terms of lowest predicted error may be used in lieu of the best mode in FIG. 9.

On the other hand, if it is determined at decision diamond 1108 that the processing budget savings from using the next-best mode(s) instead of the best mode is insignificant (e.g., the budget of the best mode is within a threshold differential of the budgets of the next-best mode(s)), the logic moves to block 1112 to use the best mode to compress and decompress the block under test and input that decompressed block to block 906 of FIG. 9. Decision diamond 1114 tests for whether the block under test is the last block of the current frame, and if not, the next block in the frame is obtained at block 1116 and the process loops back to block 1102. On the other hand, if the last block of the frame has been processed, the logic moves to block 1118 to obtain the next frame and then loops back to block 1100 to determine the processing budget for blocks of that frame.

It is to be understood that simpler techniques than that shown in FIG. 11 may be used to prune the N versions (one for each of N block compression modes) of each training uncompressed block/ For example, the top M versions in terms of lowest error prediction may be used, with 1≤M≤N−1, N being an integer.

While particular techniques are herein shown and described in detail, it is to be understood that the subject matter which is encompassed by the present application is limited only by the claims. 

What is claimed is:
 1. An assembly comprising: at least one processor configured with instructions to: train at least one machine learning (ML) engine to create higher resolution computer graphics textures (CGT) from lower resolution CGT at least in part by: compressing plural training blocks comprising a first number of texels to create compressed training blocks; decompressing the compressed training blocks to create decompressed training blocks; and inputting at least the decompressed training blocks to the ML engine for the ML engine to up-res the decompressed training blocks into predicted higher resolution training blocks.
 2. The assembly of claim 1, wherein the instructions are executable to: input to the ML engine ground truth higher resolution blocks corresponding to respective decompressed training blocks for comparison with the predicted higher resolution training blocks.
 3. The assembly of claim 1, wherein the instructions are executable to: input each one of at least some of the plural training blocks to N compressors each operating in accordance with a respective N^(th) block compression mode to generate, for each of the at least some of the plural training blocks, a respective N outputs; decompress each of the N outputs to create, for each one of the at least some of the plural training blocks, N decompressed training blocks; and input the N decompressed training blocks for each one of the at least some of the plural training blocks to the ML engine for the ML engine to up-res into predicted higher resolution training blocks.
 4. The assembly of claim 1, wherein the instructions are executable to: input each one of at least some of the plural training blocks to N compressors each operating in accordance with a respective N^(th) block compression mode to generate, for each of the at least some of the plural training blocks, a respective N outputs; for each of the N outputs, predict a respective error; and based at least in part on the respective errors, select a respective N^(th) block compression mode.
 5. The assembly of claim 4, wherein each one of the at least some of the plural training blocks is associated with a respective N^(th) block compression mode, and the instructions are executable to: compress each one of the at least some of the plural training blocks using the respective N^(th) block compression mode to create a respective one of the compressed training blocks.
 6. The assembly of claim 4, wherein the instructions are executable to: based at least in part on the respective errors and on respective processing costs associated with the respective modes, select a respective N^(th) block compression mode.
 7. The assembly of claim 1, wherein the plural training blocks comprise a mipmap.
 8. The assembly of claim 1, wherein the CGT comprises physically based rendering and materials (PBR) data.
 9. The assembly of claim 1, wherein the higher resolution CGT comprises a mipmap that is one mip level higher than the lower resolution CGT.
 10. An assembly comprising: at least one computer storage that is not a transitory signal and that comprises instructions executable by at least one processor to: input decompressed texture blocks associated with a first resolution to at least one machine learning (ML) algorithm; input ground truth texture blocks associated with a second resolution higher than the first resolution to the ML algorithm; execute the ML algorithm to train on the decompressed texture blocks and ground truth texture blocks; and subsequent to training, execute the ML algorithm to receive lower resolution textures from a source and generate higher resolution textures from the lower resolution textures without decompressing or compressing the lower resolution textures.
 11. The assembly of claim 10, wherein the instructions are executable to: input each one of at least some of the decompressed texture blocks to N compressors each operating in accordance with a respective N^(th) block compression mode to generate, for each of the at least some of the decompressed texture blocks, a respective N outputs; decompress each of the N outputs to create, for each one of the at least some of the decompressed texture blocks, N decompressed training blocks; and input the N decompressed training blocks for each one of the at least some of the decompressed texture blocks to the ML algorithm for the ML algorithm to up-res into predicted higher resolution training blocks.
 12. The assembly of claim 10, wherein the instructions are executable to: input each one of at least some of the decompressed texture blocks to N compressors each operating in accordance with a respective N^(th) block compression mode to generate, for each of the at least some of the decompressed texture blocks, a respective N outputs; for each of the N outputs, predict a respective error; and based at least in part on the respective errors, select a respective N^(th) block compression mode.
 13. The assembly of claim 12, wherein each one of the at least some of the decompressed texture blocks is associated with a respective N^(th) block compression mode, and the instructions are executable to: compress each one of the at least some of the decompressed texture blocks using the respective N^(th) block compression mode to create a respective compressed training blocks; and decompress the compress training blocks to create the decompressed texture blocks.
 14. The assembly of claim 12, wherein the instructions are executable to: based at least in part on the respective errors and on respective processing costs associated with the respective modes, select a respective N^(th) block compression mode.
 15. A method comprising: accessing at least one machine learning (ML) engine; and training the ML engine using decompressed texture blocks to generate higher resolution from lower resolution textures.
 16. The method of claim 15, wherein the ML engine generates the higher resolution textures from the lower resolution textures without using decoding or encoding.
 17. The method of claim 15, comprising training the ML engine using N versions of each one of at least some of the decompressed texture blocks, the N versions being generated by respective N compression modes.
 18. The method of claim 15, comprising training the ML engine using at least one and less than N versions of each one of at least some of the decompressed texture blocks, the N versions being generated by respective N compression modes.
 19. The method of claim 18, wherein the at least one and less than N versions of each one of at least some of the decompressed texture blocks are selected based at least in part on predicted errors associated with each of the N modes.
 20. The method of claim 19, wherein the at least one and less than N versions of each one of at least some of the decompressed texture blocks are selected based at least in part on processing constraints associated with each of the N modes. 